IEEE Draft Standard for Static Component Interconnection Test Protocol and Architecture
€108.00
IEEE Draft Standard for Analog Defect Modeling and Coverage
€114.00
IEEE Draft Standard for Extensions to Standard Test Interface Language (STIL) (IEEE Std 1450-1999) for Semiconductor Design Environments
€154.00
IEEE Draft Standard for a Mixed-Signal Test Bus
€117.00
IEEE Standard Test Interface Language (STIL) for Digital Test Vector Data
€156.00
IEEE Standard for Reduced-Pin and Enhanced-Functionality Test Access Port and Boundary-Scan Architecture
€347.00
IEEE Standard Testability Method for Embedded Core-based Integrated Circuits
€160.00
IEEE Standard for Test Access Architecture for Three-Dimensional Stacked Integrated Circuits
€101.00
IEEE Standard for Fault Accounting and Coverage Reporting(FACR) for Digital Modules
€55.00
IEEE Standard for Extensions to Standard Test Interface Language (STIL) (IEEE Std 1450-1999) for Test Flow Specification
€157.00
IEEE Standard for High-Speed Test Access Port and On-Chip Distribution Architecture
IEC/IEEE International Standard - Standard Test Interface Language (STIL) for Digital Test Vector Data
€371.00
IEC 62526 Ed. 1 (IEEE Std 1450.1(TM)-2005): Standard for Extensions to Standard Test Interface Language (STIL) for Semiconductor Design Environments
IEC 62527 Ed. 1 (IEEE Std 1450.2(TM)-2002): Standard for Extensions to Standard Test Interface Language (STIL) for DC Level Specification
€186.00
IEEE Test Interface (STIL) and Memory Core Test Language - IEEE 1450™ Series (Bundle)
€1,002.00