Superseded
Standard
Historical
IEC 62530-2:2021
SystemVerilog - Part 2: Universal Verification Methodology Language Reference Manual
Preview
Summary
IEC 62530-2:2021(E) establishes the Universal Verification Methodology (UVM), a set of application programming
interfaces (APIs) that defines a base class library (BCL) definition used to develop modular, scalable, and reusable components for functional verification environments. The APIs and BCL are based on the IEEE standard for SystemVerilog, IEEE Std 1800™. This publication has the status of a double logo IEC/IEEE standard.
interfaces (APIs) that defines a base class library (BCL) definition used to develop modular, scalable, and reusable components for functional verification environments. The APIs and BCL are based on the IEEE standard for SystemVerilog, IEEE Std 1800™. This publication has the status of a double logo IEC/IEEE standard.
Technical characteristics
| Publisher | International Electrotechnical Commission (IEC) |
| Publication Date | 07/26/2021 |
| Release Date | 07/26/2021 |
| Cancellation Date | 10/11/2023 |
| Edition | 1 |
| Page Count | 471 |
| EAN | --- |
| ISBN | --- |
| Weight (in grams) | --- |
No products.
Previous versions
26/07/2021
Superseded
Historical
11/10/2023
Active
Most Recent
No products.