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Standard
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IEC 61691-5:2004
Behavioural languages - Part 5: VITAL ASIC (application specific integrated circuit) modeling specification
Summary
Providse a standard method of modeling ASICs in VHDL.This method is aimed at providing efficient, accurate,and tool independent simulation suitable for large chip-level designs typical of those which are based on ASICs. This publication has the status of a double logo IEEE/IEC standard
Technical characteristics
| Publisher | International Electrotechnical Commission (IEC) |
| Publication Date | 10/07/2004 |
| Release Date | 10/07/2004 |
| Cancellation Date | 08/03/2010 |
| Edition | 1 |
| Page Count | 430 |
| EAN | --- |
| ISBN | --- |
| Weight (in grams) | --- |
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07/10/2004
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