JEDEC JESD22-A117E:2018

JEDEC JESD22-A117E:2018

ELECTRICALLY ERASABLE PROGRAMMABLE ROM (EEPROM) PROGRAM/ERASE ENDURANCE AND DATA RETENTION TEST

72,00 €

Detalles

This stress test is intended to determine the ability of an EEPROM integrated circuit or an integrated circuit with an EEPROM module (such as a microprocessor) to sustain repeated data changes without failure (program/erase endurance) and to retain data for the expected life of the EEPROM (data retention). This Standard specifies the procedural requirements for performing valid endurance and retention tests based on a qualification specification. Endurance and retention qualification specifications (for cycle counts, durations, temperatures, and sample sizes) are specified in JESD47 or may be developed using knowledge-based methods as in JESD94.

Información adicional

Autor JEDEC Solid State Technology Association
Publicado por JEDEC
Tipo de Documento Norma
Tema /subgroups/36080
ICS 35.080 : Desarrollo de software y documentación de sistemas
Número de páginas 24
Reemplaza JEDEC JESD22-A117D,JEDEC JESD22-A117C,JEDEC JESD 22-A117B
Palabra clave JEDEC JESD22-A117E