| Name | Unterstützung | Language | Verfügbarkeit | Datum der Ausstellung | Preis | ||
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PDF |
Englisch |
gültig |
01.01.2019 |
186,76 € |
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Details
This standard establishes the procedure for testing, evaluating, and classifying devices and microcircuits according to their susceptibility (sensitivity) to damage or degradation by exposure to a defined charged device model (CDM) electrostatic discharge (ESD). All packaged semiconductor devices, thin film circuits, surface acoustic wave (SAW) devices, opto-electronic devices, hybrid integrated circuits (HICs), and multi-chip modules (MCMs) containing any of these devices are to be evaluated according to this standard. To perform the tests, the devices must be assembled into a package similar to that expected in the final application.
Zusätzliche Information
| Autor | JEDEC Solid State Technology Association (JEDEC) |
|---|---|
| Veröffentlicht von | JEDEC |
| Document type | Normen |
| ICS | 31.080.01 : Halbleitervorrichtungen allgemein
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| Seitenzahl | 40 |
| Ersetzt | ANSI/ESDA/JEDEC JS-002:2014 |
| ANSI Approved |
