| Nom | Support | Langue | Disponibilité | Date d'édition | Prix | ||
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PDF sécurisé |
Anglais |
Active |
01/02/2015 |
204,00 € |
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Détails
This Standard was technically approved by the Silicon Wafer Global Technical Committee. This edition was approved for publication by the global Audits and Reviews Subcommittee on November 11, 2014. Available at www.semiviews.org and www.semi.org in February 2015, originally published in 1991, previously published November 2010.
Processing systems now employed in advanced device manufacturing use aligning mechanisms to position the wafer rotationally and in x-y prior to processing. Many of these scan the wafer periphery and determine the geometric center of the wafer surface. This is most often seen on stepping aligners, to minimize the effects of wafer-to-wafer diameter variation in mixed aligner type fabs. Similar center-referencing subsystems are found on many characterization systems. The wafer coordinate system provides a method for referencing any other coordinate system, such as a site, pattern, or mapping array, to the physical geometry of the wafer surface.
If the points of the array lie on the front surface of the wafer, only the x and y (or r and θ) coordinates are relevant. It has become increasingly important in semiconductor material and device manufacturing to describe, in unambiguous terms, the position of a point on a wafer that automatic processing, test, or characterization equipment can recognize and locate. For example, characterization equipment needs to report the precise locations of defects and anomalies discovered in wafers before or after processing in order to relate the presence or absence of such defects and anomalies to device yield variations. The wafer coordinate system can be used to establish the coordinates of each point of interest, and, through transformation to the yield analysis coordinate system, relate them to the die yield map.
In response to these needs, this Practice defines a wafer coordinate system to facilitate the precise locating and reporting of points on the wafer surface. If the point or points lie above or below the surface, the z-coordinate must also be used. Because the zero point on the z-axis is application specific, this practice treats the x-y-z (or r-q -z) system separately from the surface coordinate system.
Informations supplémentaires
| Auteur | Semiconductor Equipment and Materials Institute (SEMI) |
|---|---|
| Edité par | SEMI |
| Type de document | Norme |
