| Nom | Support | Langue | Disponibilité | Date d'édition | Prix | ||
|---|---|---|---|---|---|---|---|
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PDF |
Anglais |
Active |
01/08/2014 |
124,00 € |
|
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Détails
This standard defines Wide I/O 2 (WideIO2), including features, functionality, AC and DC characteristics, packages, and micropillar signal assignments. The purpose of this standard is to define the minimum set of requirements for JEDEC compliant, 8 Gb through 32 Gb SDRAM devices with 4 or 8 64-bit wide channels using direct chip-to-chip attach methods for between 1 and 4 memory devices and a controller/buffer device. The WideIO2 architecture is an evolution of the WIO architecture to enable bandwidth scaling with capacity.
Informations supplémentaires
| Auteur | JEDEC Solid State Technology Association |
|---|---|
| Edité par | JEDEC |
| Type de document | Norme |
| Thème | /subgroups/36080 |
| Nombre de pages | 116 |
| Mot-clé | JEDEC JESD229-2 |
