| Nom | Support | Langue | Disponibilité | Date d'édition | Prix | ||
|---|---|---|---|---|---|---|---|
|
PDF |
Anglais |
Active |
01/09/2010 |
57,00 € |
|
||
Détails
The purpose of this test is to measure the deviation of the terminals (leads or solder balls) from coplanarity at room temperature for surface-mount semiconductor devices. This test method is applicable for inspection and device characterization. If package warpage or coplanarity is to be characterized at reflow soldering temperatures, then JESD22-B112 should be used.
Informations supplémentaires
| Auteur | JEDEC Solid State Technology Association |
|---|---|
| Edité par | JEDEC |
| Type de document | Norme |
| Thème | /subgroups/36080 |
| Date de confirmation | 2016-06-01 |
| Nombre de pages | 14 |
| Remplace | JEDEC JESD 22-B108A |
| Mot-clé | JEDEC JESD22-B108B |
