| Nom | Support | Langue | Disponibilité | Date d'édition | Prix | ||
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Papier |
Anglais |
Active |
03/12/2022 |
170,00 € |
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PDF sécurisé |
Anglais |
Active |
03/12/2022 |
110,00 € |
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Détails
This industry standard outlines worst case industry solder assembly process conditions for passive and solid state electronic devices (hereafter referred to as “devices). This standard provides evaluation procedures to determine whether a device can be safely subjected to those solder assembly processes and still meet all device specifications and reliability and quality expectations. This standard is not to be used for evaluating sockets and connectors, instead reference EIA-364-56 and EIA-364-61.The classification requirements of this document are required for passive devices.Any surface mounted, solid state device that has been classified per J-STD-020 and can withstand the thermal profile stated in J-STD-020 is not required to be classified per this standard for thermal limitations. Similarly, any through hole mounted, solid state device that meets the requirements of JESD22-B106 is not required to be classified per this standard for thermal limitations. However, any solid state device that has a history of thermal limitations or may not be subjected to cleaning or other commonly performed assembly processes is strongly recommended to be classified for those process limitations per this standard. Surface mounted, solid state devices are not to be classified to the wave solder process stated in this standard.The solder assembly process conditions listed in this document are not recommended conditions for an assembler. An assembler needs to take into account many factors when establishing a safe assembly process for a given printed wiring board (PWB) assembly. This standard outlines a process to classify and label an electronic device’s Process Sensitivity Level (PSL) and Moisture Sensitivity Level (MSL) consistent with the semiconductor industry’s classification levels.This specification does not establish re-work simulation conditions. However, this document does highlight some commonly used alternate solder assembly processes used for attaching replacement devices. It is recommended that suppliers be aware of alternate attach processes if they are commonly used on their devices and determine if their devices are sensitive to the temperature values and durations of these alternate processes.
Informations supplémentaires
| Auteur | Association Connecting Electronics Industries (IPC) |
|---|---|
| Edité par | IPC |
| Type de document | Norme |
| Thème | /subgroups/55722 |
| Nombre de pages | 25 |
| Remplace | IPC J-STD-075,IPC 9503 |
| Mot-clé | IPC J-STD-075A |
