| Name | Support | Language | Availability | Edition date | Price | ||
|---|---|---|---|---|---|---|---|
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PDF |
English |
Active |
6/1/2019 |
€64.00 |
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Details
This standard defines the DC and AC single-ended (data) and differential (clock) operating conditions, I/O impedances, and the termination and calibration scheme for 1.25 V Pseudo Open Drain I/Os. The 1.25 V Pseudo Open Drain interface, also known as POD125, is primarily used to communicate with GDDR6 SGRAM devices.
Additional Info
| Author | JEDEC Solid State Technology Association |
|---|---|
| Published by | JEDEC |
| Document type | Standard |
| Theme | /subgroups/36080 |
| Number of pages | 20 |
| Replace | JEDEC JESD8-30 |
| Keyword | JEDEC JESD8-30A |
