| Name | Support | Language | Availability | Edition date | Price | ||
|---|---|---|---|---|---|---|---|
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PDF |
English |
Active |
6/1/2019 |
€72.00 |
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Details
This standard defines the dc and ac single-ended (data) and differential (clock) operating conditions, I/O impedance's, and the termination and calibration scheme for 1.35 V Pseudo Open Drain I/Os. The 1.35 V Pseudo Open Drain interface, also known as POD135, is primarily used to communicate with GDDR5 or GDDR5M SGRAM devices. Item 146.01B
Additional Info
| Author | JEDEC Solid State Technology Association |
|---|---|
| Published by | JEDEC |
| Document type | Standard |
| Theme | /subgroups/36160 |
| Number of pages | 26 |
| Replace | JEDEC JESD8-21B,JEDEC JESD8-21A,JEDEC JESD8-21 |
| Keyword | JEDEC JESD8-21C |
