| Name | Support | Language | Availability | Edition date | Price | ||
|---|---|---|---|---|---|---|---|
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PDF |
English |
Active |
10/1/2009 |
€64.00 |
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Details
This standard defines the dc and ac single-ended (data) and differential (clock) operating conditions, I/O impedance, and the termination and calibration scheme for 1.5 V Pseudo Open Drain I/Os. The 1.5 V Pseudo Open Drain interface, also known as POD15, is primarily used to communicate with GDDR4 and GDDR5 SGRAM devices. Item 135.01.
Additional Info
| Author | JEDEC Solid State Technology Association |
|---|---|
| Published by | JEDEC |
| Document type | Standard |
| Theme | /subgroups/36180 |
| Number of pages | 19 |
| Keyword | JEDEC JESD 8-20A |
