JEDEC JEP156A:2018

JEDEC JEP156A:2018

CHIP-PACKAGE INTERACTION UNDERSTANDING, IDENTIFICATION AND EVALUATION

€72.00

Details

This publication references a set of frequently recommended and accepted JEDEC reliability stress tests. These tests are used for qualifying new and modified technology/ process/ product families, as well as individual solid state surface-mount products.

Additional Info

Author JEDEC Solid State Technology Association
Published by JEDEC
Document type Standard
Theme /subgroups/36080
Number of pages 24
Replace JEDEC JEP156
Keyword JEDEC JEP156A