ESD SP5.4.1-2022

ESD SP5.4.1-2022

For Latch-up Sensitivity Testing of CMOS/BiCMOS Integrated Circuits Transient Latch-up Testing Device Level

€181.00

Details

This document defines procedures to characterize the latch-up sensitivity of integrated circuits triggered by fast transients.

Additional Info

Author EOS/ESD Association, Inc.
Published by ESD
Document type Standard
EAN ISBN 1585373427
Number of pages 31
Replace ESD SP5.4.1-2017
Keyword ESD SP5.4.1-2022